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[Other resource] 靳远－源程序

Description: 几个VHDL的源代码和和一个本人编写的5级流水线RISC CPU的代码-several VHDL source code, and in my preparation of a five pipelined RISC CPU code
Platform: | Size: 443397 | Author: core_design | Hits:

[Other resource] PC机程序(VB)

Description: USB接口的上位机程序，用VB开发，可以和 S3c44b0相连-Visual Basic source code, sample of connection between PC s USB and Samsung s RISC S3C44 series.
Platform: | Size: 23914 | Author: zhz | Hits:

[Other resource] embedded_risc

Description: 一个嵌入式RISC CPU 的Verilog 设计源码，可综合。内含详细的设计文挡。-an embedded RISC CPU design Verilog source code can be integrated. Detailed design containing the text block.
Platform: | Size: 128616 | Author: 箫勇天 | Hits:

[Other resource] RISC8.ZIP

Description: 简单的一个8位RISC，Verilog HDL代码,类型为pic16c57-a simple eight RISC, Verilog HDL code, the type of pic16c57
Platform: | Size: 81595 | Author: 陈正一 | Hits:

[Other resource] VHDL_freerisc8

Description: 一个8位RiSC单片机的VHDL代码， 具有很好的参考价值。-an eight RiSC SCM VHDL code, is a good reference value.
Platform: | Size: 264697 | Author: 韩红 | Hits:

[Other resource] AT91M42800A-Interrupt-ADS1_2-2_0

Description: AT91M42800A的bootloader源代码，实现了中断处理以及中断矢量。-RISC Bootloader source code, achieve interruption of treatment and interrupt vectors.
Platform: | Size: 209681 | Author: freducn2002 | Hits:

[Other resource] 1_TO_4

Description: 大型risc处理器设计源代码,这是书中的代码 基于流水线的risc cpu设计-large risc processor design source code, which is based on the code book pipelined design of the risc cpu
Platform: | Size: 152998 | Author: zhengqy826 | Hits:

[OS Develop] minirisc.tar

Description: verilog code .descrip the risc cpu.download from opencores.org
Platform: | Size: 74434 | Author: 刘科麟 | Hits:

[VHDL-FPGA-Verilog] Chapter11-13

Description: 第十一章到第十三章的代码 本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。-Chapter XI to the 13th chapter of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation.
Platform: | Size: 5088256 | Author: xiao | Hits:

[Other] MANIK

Description: MANIK is a 32 bit RISC Microprocessor. The salient features of the processor are listed below. Features Hardware Features • Data Path Width 32 bits, with Four stage pipeline. • Mixed 16/32 bit instructions for code density • Von Neumann Architecture (Data and Instruction in the same address space). • Sixteen, 32 bit General Purpose Registers. • Four USER defined instructions (with Register File Write back capability).-MANIK is a 32 bit RISC Microprocessor. The salient features of the processor are listed below. Features Hardware Features • Data Path Width 32 bits, with Four stage pipeline. • Mixed 16/32 bit instructions for code density • Von Neumann Architecture (Data and Instruction in the same address space). • Sixteen, 32 bit General Purpose Registers. • Four USER defined instructions (with Register File Write back capability).
Platform: | Size: 3395584 | Author: hfayed | Hits:

[VHDL-FPGA-Verilog] 8bit_RISC_CPU_RTL_Code

Description: 8位RISC CPU 内核源码(VERILOG版)-8 bit RSIC CPU RTL code(Verilog)
Platform: | Size: 79872 | Author: 曾亮 | Hits:

[VHDL-FPGA-Verilog] alu

Description: this is source code in verilog for arithmatic logic unit for RISC cpu
Platform: | Size: 63488 | Author: Harshit B J | Hits:

[VHDL-FPGA-Verilog] risc8

Description: 8 bit risc code with verilog
Platform: | Size: 50176 | Author: richard | Hits:

[VHDL-FPGA-Verilog] RISC_cpu

Description: 基于RISC结构的8位微处理器的verilog源代码，很好的东西。-8-bit RISC-based microprocessor architecture verilog source code, a good thing.
Platform: | Size: 263168 | Author: 西门吹雪 | Hits:

[VHDL-FPGA-Verilog] Simply-RISC-S1-Source-code

Description: 开源可扩充处理器架构，源代码，用来查询非常好，值得下载。-The open-source extensible processor architecture, used to query the source code, very good, it is worth to download
Platform: | Size: 1428480 | Author: 杨金谕 | Hits:

[VHDL-FPGA-Verilog] RISC-CPU

Description: 精简指令集RISC-CPU 可以实现阶乘运算 verilog代码编写 含有测试平台-Reduced instruction set RISC-CPU test platform can implement written in the factorial operator verilog code contains
Platform: | Size: 3288064 | Author: | Hits:

[VHDL-FPGA-Verilog] PIC16F5X-RISC

Description: PIC16F5X-大型RISC处理器-代码实现集合,其中包含工程，说明文档-PIC16F5X-Large RISC processor- code set, which includes engineering, documentation
Platform: | Size: 1547264 | Author: HP_ccyz2012 | Hits:

[Linux-Unix] go7007-v4l2

Description: bt848 bt878 cx2388x risc code generator.
Platform: | Size: 9216 | Author: minvonsan | Hits:

[Linux-Unix] imx6q

Description: bt848 bt878 cx2388x risc code generator.
Platform: | Size: 4096 | Author: reibonggh | Hits:

[VHDL-FPGA-Verilog] 32-bIT-RISC-DOC-a4

Description: it is 32 bit risc processor code in vhdl
Platform: | Size: 808960 | Author: vikram | Hits:
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